Automated PCB Parasitics Extraction from EDA Tools for Power Electronics Design Support

by Sven Fießer - Technical University Ilmenau Designing a proper PCB layout is a crucial task in most electronic applications. Having low parasitic components on the PCB is especially of utmost importance in fast switching power electronics devices using GaN or SiC semiconductors. While using such high-performance semiconductors, the PCB designer’s goal is often to improve the overall power density by increasing the switching frequency and so the influences of parasitic components are getting more pronounced. In order to speed up the PCB design process an algorithm for the extraction of parasitic components of a PCB directly from the designer’s EDA tool is presented. The extracted parasitic components will be shown to the PCB designer and can be exported to a SPICE simulator.