FPGA/SoC Board Bring-Up Tutorial (Zynq Part 1) - Phil's Lab #96
How to test, configure, and program custom hardware based on AMD/Xilinx Zynq system-on-chips (SoCs) and FPGAs. Basic power-up, JTAG checks, FTDI USB-to-UART/USB-to-JTAG programming, Vivado and Vitis configuration, Zynq IP set-up, and "Hello World" UART test. PCBs by PCBWay https://www.pcbway.com (AD: This video includes a paid promotion for PCBWay and Altium). Future bring-up videos will cover DDR3 memory, Ethernet, USB, and more! [SUPPORT] Free trial of Altium Designer: https://www.altium.com/yt/philslab (AD) Patreon: / phils94 Mixed-signal hardware design course: https://phils-lab-shop.fedevel.education Advanced Hardware Design Course Survey: https://forms.gle/X4jwvtZeJ1jTXh7r9 [GIT] https://github.com/pms67 [LINKS] Instagram: / philslabyt Zynq 7000 Series: https://www.xilinx.com/products/silic... Vivado/Vitis: https://www.xilinx.com/products/desig... Bring-Up Tutorial: https://github.com/imrickysu/ZYNQ-Cus... [TIMESTAMPS] 00:00 Introduction 00:42 Altium Designer Free Trial (Ad) 01:12 Course Survey 01:30 PCBWay (Ad) 02:02 Zynq Overview 03:15 Custom PCB Overview 07:02 Custom PCB Overview (Bottom) 07:50 Bring-Up Procedure 08:30 Initial Tests (Shorts, Voltages, Oscillators) 11:00 Vivado & Vitis 12:13 Create Vivado Project 13:12 JTAG Connection 13:40 Boot Mode Settings 14:27 JTAG Test (Vivado Hardware Manager) 15:48 Read & Write Memory (Xilinx System Debugger) 17:49 FTDI USB-to-UART & USB-to-JTAG Flashing 19:17 Hello World (Zynq PS UART) 20:00 Create & Configure Block Design (Vivado) 22:42 Export Hardware (Vivado to Vitis) 24:38 Vitis Hello World Application 28:30 Summary 29:38 Outro
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