Understanding JESD204B High-speed inter-device data transfers for SDR

by Lars-Peter Clausen At: FOSDEM 2017 JESD204B is a industry standard for interfacing high-speed converters (ADC,DAC) to logic devices (FPGA, ASIC). This presentation will give a introductionto the JESD204B standard which is gaining increasing adoption in SDR solutionsto connect the RF-fronted device to the processing device. JESD204B is a industry standard for interfacing high-speed converters (ADC,DAC) to logic devices (FPGA, ASIC). Software-defined-radio solutions follow a trend of ever increasing channelbandwidth and diversity (e.g. MIMO). Another trend is the transition fromzero-IF to direct-IF, which bypasses the analog modulator and samples the fullspectrum up to the desired signal. Both of them require additional datathroughput rates which can reach the limits of more traditional interfaceslike CMOS or LVDS. The JESD204B standard has been designed to overcome theserestrictions and allow higher throughput data rates between the converter andthe logic device. It is as such not surprising that to accommodate theincreased data rate demands of such solutions JESD204B is often adopted, bothfor discrete as well as integrated RF designs. In addition to specifying the physical layer the JESD204B specification alsohas a protocol layer defining data mapping and encoding as well as standardmethods for commonly needed features like data integrity checks, multi-chipsynchronization and deterministic latency. This presentation will provide an introduction to the JESD204B standard in thecontext of software-defined-radio explaining how the different layers insidethe JESD204B standard interact, giving developers a understanding of how tosetup and configure a JESD204B system. Room: AW1.120 Scheduled start: 2017-02-04 12:30:00