How DSP is Killing the Analog in SerDes
Alphawave IP CEO covers the benefits of DSP based SerDes that are become more popular since standards started to converge on PAM4 signaling and semiconductor manufacturing process have continued to improve.
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The Path to 200Gbps Serial Links
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How does signal integrity affect eye diagrams?
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ES3-3- "ADC-based Wireline Transceivers" - Yohan Frans
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"High-Performance SERDES Design" Online Course (2025) - Prof. Sam Palermo (Texas A&M University)
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High Speed Communications Part 1 - The I/O Challenge
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What's Changing In SerDes
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Digital Signal Processing With Audio Data - Computerphile
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How SERDES works in an FPGA, high speed serial TX/RX for beginners
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Serial Protocol Fundamentals
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FPAAs: History, Development, Classification, and Directions
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Understanding Signal Integrity
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SerDes Part 9 - Interfaces
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Preview - "High-Performance SERDES Design" Online Course (2025) - Prof. Sam Palermo (Texas A&M U.)
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Generative AI and the Outsized Role of Serdes - presented by Credo Semiconductor
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Analog Supply without a Ferrite: Proper Isolation Techniques Explained
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What is an eye diagram?
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The Insane Genius of a Formula 1 Gearbox
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SERDES Clocking and Equalization for High-Speed Serial Links, Jack Kenney
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Identifying PCIe 3 0 Dynamic Equalization Problems
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