Ripple Carry Adder Solved Problem (Digital Electronics) | Quiz # 387

In this video, the carry propagation delay of the given Ripple Carry Adder is calculated. Here is the detail of the Quiz. Subject: Digital Electronics Topic: Ripple Carry Adder Question: The 4-bit ripple carry adder is designed using the full adders as shown in figure 1, and figure 2 shows the logic circuit of each full adder. The propagation delay of XOR, AND, and the OR gate in figure 2 are 20 ns, 15 ns, and 10 ns respectively. Assume that all the inputs to the 4-bit adder are initially reset to 0. At t = 0, the inputs to the 4-bit adder are changed to A3 A2 A1 A0 = 0 1 1 0, B3 B2 B1 B0 = 1 0 1 1, and C0 = 0. The output of the ripple carry adder will be stable at t (in ns) ___________ For more information, check this video on Ripple Carry Adder:    • Ripple Carry Adder Explained (with Solved ...   #ALLABOUTELECTRONICSQuiz #RippleCarryAdder The Quiz will be helpful to all the students of science and engineering for preparing for university or competitive exams (GATE, IES, RRB JE, etc.) Follow me on YouTube:    / allaboutelect.  . Follow me on Facebook:   / allaboutelec.  . Follow me on Instagram:   / all_about.e.  . Music Credit: http://www.bensound.com/