Voltage Scaling Limits: How Low Can Vmin Go?
The ability to reduce operating voltages is key to enabling energy efficiency in VLSI systems. The minimum voltage that may be used (Vmin) in a given chip is determined by factors such as power/performance targets, variability margins, and package limitations – dependencies that may vary widely between applications. This lecture summarizes chip-level Vmin limitations and solutions that might be available to circuit designers.
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