8086 Internal Architecture in Microprocessor || Ekeeda.com

The 8086 CPU is divided into two independent functional parts, the bus interface unit or BIU, and the execution unit or EU. The Bus Interface Unit The BIU handles all data and addresses on the buses for the execution unit such as it sends out addresses, fetches instructions from memory, reads data from ports and memory as well as writes data to ports and memory. Instruction Queue To increase the execution speed, BIU fetches as many as six instruction bytes ahead to time from memory. Segment Registers The BIU contains four 16-bit segment registers. 1. Code Segment (CS): The CS register is used for addressing a memory location in the Code Segment of the memory, where the executable program is stored. 2. Data Segment (DS): The DS contains most data used by program. 3. Stack Segment (SS): SS defined a section of memory to store addresses and data while a subprogram executes. 4. Extra Segment (ES): ES is additional data segment that is used by some of the string to hold the extra destination data. Instruction Pointer (IP) In the BIU, the next register, below the segment register is instruction pointer. The instruction pointer (IP) holds the 16-bit address of the next code byte within this code segment. The Execution Unit The execution unit (EU) tells the BIU where to fetch instructions or data from, decodes instructions, and executes instructions. The functional parts of the execution unit are control circuitry or system, instruction decoder, and Arithmetic logic unit (ALU). Control circuitry to perform various internal operations. A decoder in the EU translates instructions fetched from memory to generate different internal or external control signals that required performing the operation. The EU has a 16-bit ALU, which can perform arithmetic operations such as add, subtract etc. and logical operations such as AND, OR, XOR, increment, decrement etc. Flag Register A 16-bit flag register is a flip-flop which indicates some condition produced by the execution of an instruction or controls certain operations of the EU. It has 9 flags and they are divided into two categories: 1. Conditional Flags *Carry Flag (CF): This flag will be set to one if the arithmetic operation produces the carry in MSB position. *Auxiliary Flag (AF): If an operation performed in ALU generates a carry/barrow from lower nibble (i.e. D0 – D3) to upper nibble (i.e. D4 – D7), the AF flag is set i.e. carry given by D3 bit to D4 is AF flag. *Parity Flag (PF): This flag is used to indicate the parity of result. If lower order 8-bits of the result contains even number of 1’s, the Parity Flag is set to one and for odd number of 1’s, the Parity Flag is reset i.e. zero. Zero Flag (ZF): It is set to one; if the result of arithmetic or logical operation is zero else it is reset. *Sign Flag (SF): In sign magnitude format the sign of number is indicated by MSB bit. *Overflow Flag (OF): It occurs when signed numbers are added or subtracted. An OF indicates that the result has exceeded the capacity of machine. 2.Control Flags 1. Trap Flag (TP): It is used for single step control. It allows user to execute one instruction of a program at a time for debugging. 2. Interrupt Flag (IF): It is an interrupt enable/disable flag, i.e. used to allow/prohibit the interruption of a program. 3. Direction Flag (DF): It is used in string operation. If it is set, string bytes are accessed from higher memory address to lower memory address. General Purpose Registers These register pairs is referred to the AX, BX, CX, and DX resp. 1. AX Register: For 16-bit operations, AX is called the accumulator register that stores operands for arithmetic operations. 2. BX Register: This register is mainly used as a base register. It holds the starting base location of a memory region within a data segment. 3. CX Register: It is defined as a counter. It is primarily used in loop instruction to store loop counter. 4. DX Register: DX register is used to contain I/O port address for I/O instruction. Stack Pointer Register The stack pointer (SP) register contains the 16-bit offset from the start of the segment to the memory location where a word was most recently stored on the stack. #OnlineLectures #EducationForFree #FullHD #HappyLearning #Engineering Thanks For Supporting Us Website - http://ekeeda.com Parent Channel -    / ekeeda   Facebook -   / ekeeda.video   Twitter -   / ekeeda_official   Blogger - http://ekeeda.blogspot.in Pinterest -   / ekeedavideo   Digg - http://digg.com/u/ekeeda_Video Tumbler - https://www.tumblr.com/blog/ekeedavideo Reddit -   / ekeeda_video   LinkedIn-   / ekeeda-video-4a5b83124   Happy Learning : ) ~-~~-~~~-~~-~ Please watch: "19 Problem 6 on SFD and BMD for the beam as shown in figure"    • SFD and BMD for Beam - Problem 4 - Shear F...   ~-~~-~~~-~~-~