State Of The Market For Edge Silicon
The explosion of data and the rapid ramp of AI is causing significant changes in how chips are architected. At the edge, the key metrics are power, latency, and performance, but those can vary significantly by application and by workload. Steve Roddy, chief marketing officer at Quadric, talks with Semiconductor Engineering about the need to balance performance and efficiency with flexibility for different applications, what makes one chip better than another, and how to determine the best combination of processing elements.

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Changes In Chip Architectures At The Edge

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Memory For AI At The Edge

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AI At Your Own Pace | Episode 3 | Let AI Handle the Backlog

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The Insane Complexity of the Semiconductor Global Supply Chain

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Turing Award Winner: Disagreeing with Google, Postgres, Future Problems | Mike Stonebraker

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Arm’s Dong Wei on the End of Monolithic Silicon Design

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New Performance Requirements For Audio

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EEVblog 1752 - Texas Instruments SCREWED UP the NE5532!

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How Huawei Just Built an Impossible Chip

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China Just Built What TSMC Said Was Impossible

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Co-Packaged Optics for our Connected Future

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Semiconductors explained in 16 mins | Chris Miller

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Silicon Valley’s Doing Hard Things Again

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New Chip Factory That Terrifies TSMC

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Yann LeCun: World Models: Enabling the next AI revolution

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AI Bubble Will Burst Eventually Says Bridgewater's Ray Dalio

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Demis Hassabis: Agents, AGI & The Next Big Scientific Breakthrough

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Chip design from the bottom up – Reiner Pope

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The ASML Replacement Nobody Saw Coming

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