CS302 Short Lecture 31 || Up Counter by SR Flip Flop

This is lecture number 31 of the Digital Logic and Design (CS302) short lecture series for the students of BSCS, BSIT, BSSE MIT and MCS of Virtual University of Pakistan (VU), University of Punjab (PU) and other universities. This lecture is related to Up Counter design procedure by using SR Flip flop, all the stages of design procedure i.e. State diagram, next state table, flip-flop transition table, Karnaugh maps, logic expression for flip-flops and Circuit implementation has been discussed in detail. CS302 Short Lecture 31 | CS302 Short Lectures #CS302 #DLD #VU #DigitalLogicDesign #flipflops