“PLL Design on Cadence Virtuoso | Lecture 2: Charge Pump Schematic & Simulation”

In this lecture, we continue our PLL (Phase-Locked Loop) design series on Cadence Virtuoso. After completing the Phase Frequency Detector (PFD), we now move to the Charge Pump (CP)—a crucial block in PLL design. 📌 Lecture 2 Overview: Introduction to the Charge Pump and its role in PLL Designing the schematic of Charge Pump in Cadence Virtuoso Running simulations to verify the output behavior Understanding how the CP interacts with the PFD and Loop Filter This video is part of a complete PLL lecture series covering: Phase Frequency Detector (PFD) Charge Pump (CP) Loop Filter (LF) Voltage Controlled Oscillator (VCO) Frequency Divider Full PLL Integration & Analysis 🔔 Subscribe and follow the playlist for upcoming lectures on Loop Filter, VCO, Frequency Divider, and complete PLL simulation. 🎓 Suitable for: VLSI / MTech / BTech students Researchers in Analog & Mixed Signal Circuit Design Engineers working with PLL architectures in Cadence Virtuoso #PLL #ChargePump #CadenceVirtuoso #AnalogDesign #VLSI