What Star Trek can teach us about using AI in FPGA design (Adam Taylor)

Like many engineers, I was initially sceptical of AI and its capabilities. However, over the last few years it has grown to be something FPGA engineers cannot ignore. Can it help us as FPGA engineers do our jobs better, faster, smarter? In many ways, it’s the next natural layer of abstraction in FPGA design, extending a progression that has taken us from Boolean logic to schematics, HDLs to HLS. Its power lies in its ability to accelerate implementation, but it does not replace the engineer. Far from it. In this session, we will look at how the effective use of AI calls for clear, structured guidance backed by deep technical knowledge. Taking Star Trek as an example, we have all seen Geordi La Forge or even Scottie talking to the computer to address engineering problems. They’re directing and guiding a capable assistant rather than presuming what the black box says is correct. Importantly, we must still understand what has been produced by AI, why it behaves as it does, and how to verify that it is accurate, secure, reliable, and safe. Used well, AI can increase productivity and help us meet shrinking schedules and expanding device capabilities. Used poorly, it can create confusion and technical debt. The challenge is not whether to adopt AI, but how to equip the next generation with the expertise required to guide it, validate it, and ensure that it strengthens rather than weakens our engineering foundations in the future.