CS302P Lecture 14 || Construction of 4 Bit Ripple Counter

This is lecture number 14 of the Digital Logic and Design Practical (CS302P) short lecture series for the students of BSCS, BSIT, BSSE MIT and MCS of Virtual University of Pakistan (VU), University of Punjab (PU) and other universities. In this lecture the construction of 4 bit asynchronous counter has been discussed, it is also discussed that how can we converter 4 bit counter to mod 10 counter and mod 12 counter. CS302 Short Lectures || Digital Logic and Design    • CS302 Short Lecture 1 || Overview of Compl...   #CS302 #DLD #VU #DigitalLogicDesign