BeeTalk 2021 - Prof. Paul Jespers, University of Louvain, Belgium - 22 Juin 2021

Systematic Design of Analog CMOS Circuits Using Lookup Tables Sizing CMOS analog circuits is done generally running SPICE iteratively. The designer adjusts sizes and currents until he reaches desired performances. Taking advantage of analytic expressions to reach an optimal design is not possible since bias and size dependent parameters are not available. The objective of this tutorial is to present a sizing methodology that takes advantage of parameters extracted from precomputed lookup tables derived from SPICE. Features like gain, current consumption and so on ... can be evaluated and optimized without the need to run repeated simulations.