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An overview of recent RISC-V Foundation activities - ORConf 2017

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E. Tallaksen: UVVM – An introduction to the world’s fastest growing FPGA verification methodology

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Why Your Team Should be using VHDL + OSVVM for Verification

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Keynote: After the AI Hype – What’s Real, and What’s Next - Richard Campbell - 2026

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Chip design from the bottom up – Reiner Pope

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Turing Award Winner: Disagreeing with Google, Postgres, Future Problems | Mike Stonebraker
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Kubernetes Tutorial for Beginners [FULL COURSE in 4 Hours]

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Co-Creator of Haskell: Functional Programming, Thinking in Types, Useless Languages | Simon Jones

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UVVM: Bringing UVM to VHDL

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Do not be afraid of UVM

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Open-Source FPGAs: Tools, Flows, and Visualization (Alex Singer)

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SpeedupVHDLverificationsignificantly by making a bettertestbencharchitectureandasimplertestsequencer

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Creator of C++: Bell Labs, Negative Overhead Abstraction, Mistakes | Bjarne Stroustrup

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From Tapeouts to Products: Why Open-Source Silicon Must Solve Real Problems to Survive (M. Kassem)

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Google & AWS Veteran: What Top Tier Software Architects Do Differently

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the true reason C++ always wins

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The Story of C++: The World's Most Consequential Programming Language | The Official Story

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I Outsmarted Pro Car Thieves

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System Design Explained: APIs, Databases, Caching, CDNs, Load Balancing & Production Infra

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