Instruction Set Architecture - x86, ARM and RISC-V | Embedded systems podcast, in Pyjama

๐—–๐—ผ๐˜‚๐—ฟ๐˜€๐—ฒ ๐—ผ๐—ป ๐—– ๐—ฃ๐—ผ๐—ถ๐—ป๐˜๐—ฒ๐—ฟ๐˜€ - https://inpyjama.com/blog/c-pointers-... ๐‰๐จ๐ข๐ง ๐ญ๐ก๐ž ๐œ๐จ๐ฆ๐ฆ๐ฎ๐ง๐ข๐ญ๐ฒ (๐ƒ๐ข๐ฌ๐œ๐จ๐ซ๐): ย ย /ย discordย ย  ๐˜๐จ๐ฎ๐“๐ฎ๐›๐ž ๐Œ๐ž๐ฆ๐›๐ž๐ซ๐ฌ๐ก๐ข๐ฉ: https://www.youtube.com/@inpyjama/join ๐—ฃ๐—ฟ๐—ฒ๐˜ƒ๐—ถ๐—ผ๐˜‚๐˜€ ๐—ฉ๐—ถ๐—ฑ๐—ฒ๐—ผ: ย ย ย โ€ขย DSA,ย Embeddedย Systems,ย Hype?ย |ย Embeddedย sy...ย ย  ๐—™๐˜‚๐—น๐—น ๐—ฃ๐—น๐—ฎ๐˜†๐—น๐—ถ๐˜€๐˜: ย ย ย โ€ขย Embeddedย Systemsย Podcast,ย inย Pyjama!ย ย  ๐—œ๐—ป ๐˜๐—ต๐—ถ๐˜€ ๐—ฉ๐—ถ๐—ฑ๐—ฒ๐—ผ: We chat about the instructions set architecture, what it is, why we care about it, and where it becomes relevant. Intel Architecture ISA document: https://cdrdv2-public.intel.com/78958... ARM Architecture: https://cdrdv2-public.intel.com/65420... RISC-V ISA Manual: https://riscv.org/wp-content/uploads/... ๐—ง๐—ฎ๐—ฏ๐—น๐—ฒ ๐—ผ๐—ณ ๐—ฐ๐—ผ๐—ป๐˜๐—ฒ๐—ป๐˜๐˜€ 00:00 Topic for today 00:24 Introduction to Instruction Set Architecture (ISA) and Why We Care? 02:08 Relation between CPU and ISA 03:50 CISC vs RISC Architecture - Instruction Decoding 06:32 CPU and Registers 07:18 The need for ISA - The abstraction layer 09:12 Back to CISC vs RISC 09:37 Exploring the relation between architecture and instructions 11:40 Assembly instructions and ISA 13:25 Directives in assembly language 14:03 RISC architecture and effect on instruction count and formatting 15:41 What does "Reduced" in RISC really mean? 17:38 Dev presents his understanding 18:26 Venturing into different types of ISA - x86, ARM, RISC-V 19:34 ARM and RISC-V architecture 20:33 ARM as a company and its business model 23:52 Background of RISC-V, Royalty, and crossing the boundary and drifting... 28:44 Back to the story of the Origin of RISC-V 29:51 Ratification and Idea of ISA Extensions 30:31 Integer Extension - The minimum instructions to be implemented to be called RISC-V 31:01 More about the idea of extensions to the ISA 32:05 Intel x86 ISA 35:00 CISC, Memory Speed and the influence on the CPU design 36:36 ISA and effects on the complexity of Compiler 38:00 Example of CISC instruction - Find substring! 38:45 More on compiler design and abstractions - GCC and Clang 41:42 Detour: MIPS, SPARC etc architecture 43:33 The Story of Origin of ARM 45:57 Apple, ARM, and parts of the Origin Story. 48:39 Why Should an embedded engineer care about ISA? 49:27 Should the C/C++ programmer care? 50:24 When assembly shines - What cannot be done in C/C++ 51:10 Implementing locks and the use of atomic instructions 52:30 Implementing scheduler and special instructions 55:17 Standards and abstraction - memory barrier for example 56:54 TECH GLITCH! (skip) 58:30 Back to architecture and effect on compiler design. 01:02:57 Rajat's work at ATMEL and the source code in Assembly 01:03:09 Assembly and Highspeed I/O 01:04:18 Converting C to assembly and optimizing it. 01:05:47 Accidental detour to wifi firmware... Linux and RTOS! 01:08:56 Internal discussion! (skip) 01:09:06 Closing thoughts ๐™‹๐™–๐™ฃ๐™š๐™ก ๐™ˆ๐™š๐™ข๐™š๐™—๐™š๐™ง๐™จ: [Darth Vader ] ๐—ฃ๐—ถ๐˜†๐˜‚๐˜€๐—ต ๐—œ๐˜๐—ฎ๐—ป๐—ธ๐—ฎ๐—ฟ: ย ย /ย streetdoggย ย  [Yoda ] ๐—ฅ๐—ฎ๐—ท๐—ฎ๐˜ ๐—•๐—ฎ๐˜๐—ฟ๐—ฎ: ย ย /ย rajat-batra-a88124126ย ย  [Han Solo. ] ๐——๐—ฒ๐˜ƒ ๐—•๐—ถ๐˜€๐—ต๐—ป๐—ผ๐—ถ: ย ย /ย dev-bishnoi-468596126ย ย  [The Mandolerian ] ๐—ช๐—ฎ๐˜€๐—ถ๐—บ ๐—”๐—ธ๐—ฟ๐—ฎ๐—บ: ย ย /ย wasim-akram-6a86a09bย ย  [Luke Skywalker ] ๐— ๐—ฎ๐—ต๐—บ๐—ฎ๐—ฑ ๐—•๐—ต๐—ฎ๐—ฟ๐—บ๐—ฎ๐—น: ย ย /ย mahmadbharmalย ย  ----- We will be sending updates to all the members of the inpyjama community! If you'd like to not miss out on those, please be sure to sign up here: https://inpyjama.com/#/portal/signup #inpyjama #embeddedsystems #embedded #systemdesign #software #softwareengineering #embeddedpodcast

Explaining RISC-V: An x86 & ARM Alternative
โ–ถ๏ธŽ

Explaining RISC-V: An x86 & ARM Alternative

Linux on RISC-V and the New OS-A Platform - Drew Fustini, BayLibre
โ–ถ๏ธŽ

Linux on RISC-V and the New OS-A Platform - Drew Fustini, BayLibre

.NET Full Stack Course Demo
โ–ถ๏ธŽ

.NET Full Stack Course Demo

The Genius of RISC-V Microprocessors - Erik Engheim - ACCU 2022
โ–ถ๏ธŽ

The Genius of RISC-V Microprocessors - Erik Engheim - ACCU 2022

Turing Award Winner: Disagreeing with Google, Postgres, Future Problems | Mike Stonebraker
โ–ถ๏ธŽ

Turing Award Winner: Disagreeing with Google, Postgres, Future Problems | Mike Stonebraker

Turbo Pascal to Delphi. The Greatest IDE Story Ever Told
โ–ถ๏ธŽ

Turbo Pascal to Delphi. The Greatest IDE Story Ever Told

ARM Architecture Explained: Everything You Need to Know | STM32
โ–ถ๏ธŽ

ARM Architecture Explained: Everything You Need to Know | STM32

David Patterson: Computer Architecture and Data Storage | Lex Fridman Podcast #104
โ–ถ๏ธŽ

David Patterson: Computer Architecture and Data Storage | Lex Fridman Podcast #104

RISC vs CISC Computer Architectures (David Patterson) | AI Podcast Clips with Lex Fridman
โ–ถ๏ธŽ

RISC vs CISC Computer Architectures (David Patterson) | AI Podcast Clips with Lex Fridman

The ARM University Program, ARM Architecture Fundamentals
โ–ถ๏ธŽ

The ARM University Program, ARM Architecture Fundamentals

RISC V ISA & Foundation Overview
โ–ถ๏ธŽ

RISC V ISA & Foundation Overview

Why RISC-V Matters
โ–ถ๏ธŽ

Why RISC-V Matters

Co-Creator of Haskell: Functional Programming, Thinking in Types, Useless Languages | Simon Jones
โ–ถ๏ธŽ

Co-Creator of Haskell: Functional Programming, Thinking in Types, Useless Languages | Simon Jones

Breaking the x86 Instruction Set
โ–ถ๏ธŽ

Breaking the x86 Instruction Set

Arm vs RISC-V? Which One Is The Most Efficient?
โ–ถ๏ธŽ

Arm vs RISC-V? Which One Is The Most Efficient?

Introduction to ARM: Cortex M CPUs | Embedded Systems podcast, in Pyjama!
โ–ถ๏ธŽ

Introduction to ARM: Cortex M CPUs | Embedded Systems podcast, in Pyjama!

You Can Learn RISC-V Assembly in 10 Minutes  |  Getting Started RISC-V Assembly on Linux Tutorial
โ–ถ๏ธŽ

You Can Learn RISC-V Assembly in 10 Minutes | Getting Started RISC-V Assembly on Linux Tutorial

ARM - M: Build process, role of linker and Linker scripts! | Embedded Systems podcast, in Pyjama!
โ–ถ๏ธŽ

ARM - M: Build process, role of linker and Linker scripts! | Embedded Systems podcast, in Pyjama!

MeganWachs - Keynote RISC-V and FPGAs: Open Source Hardware Hacking
โ–ถ๏ธŽ

MeganWachs - Keynote RISC-V and FPGAs: Open Source Hardware Hacking

4. Assembly Language & Computer Architecture
โ–ถ๏ธŽ

4. Assembly Language & Computer Architecture