CHERI: A Hybrid Capability-System Architecture for Scalable Software Compartmentalization

CHERI: A Hybrid Capability-System Architecture for Scalable Software Compartmentalization Robert N. M. Watson Presented at the 2015 IEEE Symposium on Security & Privacy May 18--20, 2015 San Jose, CA http://www.ieee-security.org/TC/SP2015/ ABSTRACT CHERI extends a conventional RISC Instruction-Set Architecture, compiler, and operating system to support fine-grained, capability-based memory protection to mitigate memory-related vulnerabilities in C-language TCBs. We describe how CHERI capabilities can also underpin a hardware-software object-capability model for application compartmentalization that can mitigate broader classes of attack. Prototyped as an extension to the open-source 64-bit BERI RISC FPGA soft-core processor, Free BSD operating system, and LLVM compiler, we demonstrate multiple orders-of-magnitude improvement in scalability, simplified programmability, and resulting tangible security benefits as compared to compartmentalization based on pure Memory-Management Unit (MMU) designs. We evaluate incrementally deployable CHERI-based compartmentalization using several real-world UNIX libraries and applications.