JTAG Boundary-Scan Introduction Tutorial

Boundary-Scan is an integrated method for testing interconnects on printed circuit boards (PCBs) that are implemented at the integrated circuit (IC) level. Boundary-Scan is commonly referred to as JTAG and defined by the Institute of Electrical and Electronic Engineers (IEEE) 1149.1, which originally began as an integrated method for testing interconnects on printed circuit boards (PCBs) implemented at the integrated circuit (IC) level. Since its introduction as an industry standard in 1990, boundary-scan (also known as JTAG) has enjoyed growing popularity for board level manufacturing test applications. Boundary-Scan has rapidly become the technology of choice for building reliable high technology electronic products with a high degree of testability. Due to the low-cost and IC level access capabilities of boundary-scan, its use has expanded beyond traditional board test applications into product design and service. JTAG Boundary-Scan Whitepaper https://www.corelis.com/whitepapers/r... JTAG Tutorial http://www.corelis.com/education/JTAG...